2006/05/27 nand latch simulation with zero delay

module test_Nand_Latch_1;
reg preset,clear;
wire q,qbar;
Nand_Latch_1 M1(q,qbar,preset,clear);
initial
begin
$monitor($time,"preset=%b clear=%b q=%b qbar=%b",preset,clear,q,qbar);
end
initial

begin
#10preset=0;
#20 preset=1;
#30 clear=0;
#40clear=1;
#50 preset=0;
end initial
#60 $finish;
endmodule


module Nand_Latch_1 (q,qbar,preset,clear);
output q,qbar;
input preset,clear;
nand G1(q,preset,qbar); nand G2(qbar,clear,q);
endmodule